TSS Hardware Engineering Internship (Summer 2027) (FPGA)

Location: Hybrid, with the 10-week internship taking place at the Soho-based New York City office and flexible in-office days.

Salary: $4,325 per week for bachelor’s, master’s, or PhD students, based on academic degree conferred.

Company

Quantitative investment management and systematic trading firm using technology, artificial intelligence, data science, and quantitative research to develop trading and risk-management solutions.

What you will do

• Design, simulate, and test digital logic for FPGA-based systems with support from experienced engineers.
• Contribute to reusable RTL components and verification environments.
• Write tests and debugging tools using SystemVerilog, Python, or similar languages.
• Investigate functional and performance issues using simulation and waveform-analysis tools.
• Gain hands-on experience with synthesis, timing analysis, FPGA implementation, and hardware-software interfaces.
• Collaborate with hardware, software, networking, and quantitative teams; document work and present findings.

Requirements

• Currently pursuing a bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
• Completed coursework or projects in digital logic, computer architecture, embedded systems, computer networking, or a related area.
• Familiarity with a hardware-description language such as SystemVerilog, Verilog, or VHDL.
• Basic programming experience in Python, C, C++, or a similar language.
• Understanding of combinational and sequential logic, finite-state machines, pipelining, and clocked circuits.
• Strong problem-solving, communication, and collaboration skills.
• Interest in learning FPGA development, verification, computer networking, and low-latency systems.
• Experience through coursework, labs, research, student teams, or personal projects; prior professional hardware experience is not required.

Nice to have

• Experience with an FPGA development board or vendor toolchain.
• Familiarity with simulation, testbenches, assertions, or waveform debugging.
• Exposure to synthesis, timing constraints, clock-domain crossings, or hardware verification.
• Familiarity with networking concepts or protocols such as Ethernet, TCP/IP, or UDP.
• Participation in robotics, chip design, embedded systems, competitive programming, or engineering clubs.
• Experience using Git or another version-control system.
• Interest in high-performance computing or financial technology.

Culture & Benefits

• Hybrid work policy with flexible in-office days.
• Budget for home office setup.
• Onsite gyms with laundry service, wellness activities, casual dress, snacks, and game rooms.
• Assigned mentor and a single project culminating in a final presentation.
• Access to company events, brown bag lunches, guest speakers, and intern-specific social events.