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13 дней назад

Director, Advanced Power Silicon & Packaging Technology

Формат работы
onsite
Тип работы
fulltime
Грейд
director
Английский
b2
Страна
China
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Текст:
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TL;DR
Director, Advanced Power Silicon & Packaging Technology (Power Semiconductors/Advanced Packaging): Leading the strategy, architecture, development, and deployment of next-generation power delivery technologies across silicon, packaging, and system integration with an accent on GaN, SiC, chiplets, 2.5D/3D packaging, and vertical power delivery. Focus on optimizing power integrity, signal integrity, thermal performance, electromigration reliability, and power delivery networks while driving technologies from concept through production.

Location: Shanghai (JingAn), China

Company

hirify.global develops semiconductor technologies for power delivery, AI, datacenter, networking, and high-performance computing platforms.

What you will do

  • Define and execute roadmaps for advanced power silicon, packaging, heterogeneous integration, chip-package-system co-design, and vertical power delivery.
  • Lead adoption of GaN, SiC, advanced CMOS, and BCD power processes while optimizing efficiency, die area, and reliability.
  • Establish roadmaps for 2.5D/3D packaging, chiplets, silicon interposers, fan-out packaging, embedded power delivery, and co-packaged solutions.
  • Lead cross-functional optimization of power integrity, signal integrity, thermal performance, electromigration reliability, and power delivery networks.
  • Drive technology incubation, proof-of-concept programs, strategic partnerships, intellectual property development, patents, and technical publications.
  • Mentor senior technical leaders and build organizational capability across silicon design, packaging, architecture, manufacturing, and product organizations.

Requirements

  • BS in Electrical Engineering, Physics, Materials Science, or a related discipline; MS or PhD preferred.
  • 15+ years of semiconductor and power technology experience.
  • 6+ years leading technology, architecture, or engineering organizations.
  • Proven success delivering innovative silicon and packaging technologies from concept through production.
  • Expertise in power semiconductor devices, power integrity analysis, chiplet integration, 2.5D/3D packaging, fan-out technologies, silicon interposers, package reliability, power delivery networks, thermal management, manufacturing, and supply chain considerations.
  • Work is based in Shanghai (JingAn), China.

Nice to have

  • Expertise in vertical power delivery, backside power distribution networks, and embedded voltage regulation.
  • Strong patent portfolio and industry recognition.
  • Participation in IEEE, OCP, JEDEC, or semiconductor standards organizations.

Culture & Benefits

  • Technical culture focused on rigor, innovation, accountability, and execution excellence.
  • Cross-functional collaboration across silicon design, packaging, architecture, manufacturing, and product organizations.
  • Partnerships with semiconductor foundries, OSAT partners, EDA vendors, universities, and research institutions.

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