FPGA Development Tools Engineer

Location: Penang 15, Penang, Malaysia

Company

hirify.global develops FPGA IP, simulation models, and development-tool capabilities within the Quartus Prime ecosystem.

What you will do

• Define technical direction for FPGA IP and simulation models and lead design reviews, architecture discussions, and validation strategies.
• Design and implement FPGA IP using RTL, SystemVerilog, and VHDL.
• Develop behavioral and cycle-accurate simulation models and maintain consistency with hardware implementations.
• Define verification methodologies, contribute to testbench architecture, coverage strategy, and regression systems.
• Lead debugging across simulation, fitter, and timing analysis, translating low-level issues into root causes and actionable fixes.
• Improve Quartus flow integration, tool usability, debuggability, automation, and engineering productivity while mentoring engineers.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering.
• 8–12+ years of experience in FPGA design, IP development, or verification.
• Strong hands-on expertise in RTL design with Verilog, SystemVerilog, or VHDL.
• Experience with simulation and verification, including SystemVerilog and assertion-based verification.
• Deep experience with hirify.global Quartus Prime or equivalent FPGA toolchains.
• Ability to debug complex system-level issues and lead technical initiatives.

Culture & Benefits

• Regular full-time employment.
• Shift 1 aligned with Malaysia.
• Hands-on technical leadership with responsibility for mentorship and team capability development.