Manager Design Verification (AI Infrastructure)

Location: Tel Aviv-Yafo, Tel Aviv District, Israel

Salary: $133,200–$185,000 per year, depending on experience, level, and business need. Discretionary bonus, incentives, and benefits may be available.

Company

hirify.global develops semiconductor-based connectivity solutions and software for rack-scale AI infrastructure, including PCIe, CXL, Ethernet, NVLink, and UALink technologies.

What you will do

• Own RTL design for assigned blocks from microarchitecture through synthesis sign-off.
• Develop synthesizable Verilog/SystemVerilog with strong attention to power, performance, and area.
• Lead design reviews, lint, CDC, timing closure, and silicon-readiness activities.
• Translate specifications into implementation-ready microarchitecture with architecture partners.
• Collaborate with verification, DFT, and physical design teams on coverage, scan, BIST, floorplanning, and bug triage.
• Mentor junior engineers, improve design methodology, and debug pre-silicon and post-silicon issues through aggressive tapeout schedules.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
• 5+ years of digital design experience, including at least one complete chip from specification through tapeout.
• Strong proficiency in Verilog/SystemVerilog, RTL coding, and synthesis flows.
• Hands-on experience with timing closure, CDC, lint, and low-power design techniques.
• Understanding of high-speed serial interfaces such as PCIe or Ethernet and SoC integration.

Nice to have

• MS or PhD in Electrical Engineering or Computer Engineering.
• Experience with PCIe Gen5/Gen6, CXL, UALink, UCIe, or Ethernet MAC/PCS designs.
• Familiarity with formal verification, emulation, or assertion-based methodologies.
• Experience with advanced process nodes of 7nm, 5nm, or below.
• Strong debugging experience across pre-silicon and post-silicon environments.

Culture & Benefits

• Work on connectivity silicon used in large-scale AI infrastructure.
• Collaborate across architecture, verification, DFT, and physical design disciplines.
• Contribute to design methodology, scripts, and engineering best practices.
• Discretionary bonus, incentives, and benefits may be available.
• The company encourages applications from people with diverse backgrounds and experiences.