Назад
Company hidden
25 дней назад

Software Engineer II: Hardware Verification Compiler

Формат работы
onsite
Тип работы
fulltime
Грейд
middle
Английский
b2
Страна
Brazil
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/
TL;DR
Software Engineer II: Hardware Verification Compiler (C/C++/SystemVerilog): Developing compiler technologies and runtime support for hardware-assisted verification platforms with an accent on HDL front-end development, compiler performance, and maintainable C/C++ code. Focus on improving compiler infrastructure and flows, developing SystemVerilog support, and integrating with RTL simulation, synthesis, and runtime environments.

Location: Onsite in Belo Horizonte, Brazil, at Av. Contorno 5800

Company

Provides electronic design automation tools, intellectual property, and hardware for the electronics design chain, including chip design, packaging, boards, and systems.

What you will do

  • Develop maintainable, high-quality C/C++ code for an HDL compiler and runtime support.
  • Develop the compiler front end for SystemVerilog.
  • Improve compiler performance, infrastructure, and development flows.
  • Work with RTL simulation, synthesis, and runtime environments.
  • Collaborate with cross-geography teams to enhance products for hardware-assisted verification platforms.

Requirements

  • Bachelor’s degree in computer science, computer engineering, or a related field, with 3+ years of experience.
  • Master’s degree in computer science, computer engineering, or a related field.
  • Professional experience with C/C++ and object-oriented programming.
  • Knowledge of compilers, advanced data structures, and algorithms.
  • Experience with the Unix environment.
  • Very good spoken and written English and Portuguese.

Nice to have

  • Experience with version control systems.
  • Experience with Tcl or Python scripting.
  • Knowledge of formal verification or simulation.
  • Experience with EDA and VLSI design, including Verilog, SystemVerilog, and VHDL.

Culture & Benefits

  • Full-time employment under the CLT employment category.
  • 40-hour work week.
  • Competitive benefits.
  • Dynamic, fast-paced, and collaborative environment with cross-geography team integration.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →