Senior FPGA RTL and Firmware Development Engineer (FPGA)

Location: Penang 15, Penang, Malaysia; Shift 1 (Malaysia)

Company

hirify.global develops FPGA devices, development kits, validation boards, and platform-level hardware solutions.

What you will do

• Architect, design, implement, and validate FPGA RTL solutions in Verilog and/or VHDL.
• Lead the FPGA development flow, including simulation, synthesis, implementation, timing analysis, timing closure, configuration, and release readiness with Quartus II.
• Develop and integrate embedded C/C++ firmware for Nios II systems using the hirify.global Embedded Design Suite.
• Translate system and performance requirements into RTL, register maps, firmware interfaces, and verification strategies.
• Bring up development and validation boards, execute lab and system-level testing, and debug hardware-software integration issues.
• Collaborate with architecture, board design, silicon, software, applications, and system engineering teams while guiding less-experienced engineers.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
• 10+ years of professional experience in FPGA RTL design, implementation, and system-level validation.
• Strong experience with Verilog and/or VHDL, digital logic, computer architecture, clock-domain crossing, reset design, and FPGA integration.
• Hands-on experience with Quartus II, including simulation, synthesis, implementation, timing analysis, timing closure, and device programming.
• Experience with C and/or C++, Nios II firmware, peripheral access, interrupts, memory-mapped I/O, drivers, or board-support software.
• Ability to debug complex FPGA platforms using lab equipment and structured root-cause analysis.

Nice to have

• Nios II system architecture, Platform Designer/Qsys, custom IP, Avalon interfaces, DMA, memory controllers, and peripheral subsystems.
• FPGA configuration, boot flows, JTAG, PCIe, Ethernet, DDR memory, or high-speed serial interfaces.
• SystemVerilog, assertion-based verification, Python, Tcl, continuous integration, version control, and automated validation.
• Technical leadership, mentoring, cross-functional debug coordination, and Agentic AI knowledge.

Culture & Benefits

• Regular full-time employment in a cross-functional engineering environment.
• Collaboration with global architecture, hardware, silicon, software, and development kit teams.
• Work focused on next-generation FPGA platforms, development kits, and validation systems.