Senior Place & Route (P&R) Design Automation Engineer

Location: Toronto, Ontario, Canada

Salary: 83,500–120,925 CAD, plus performance-based incentive opportunities.

Company

hirify.global is an independent FPGA solutions provider developing programmable technologies for AI, cloud, networking, and edge markets.

What you will do

• Develop and support automated Place & Route tools, flows, and methodologies for FPGA silicon design.
• Maintain and improve P&R automation infrastructure, scripts, and utilities for usability, efficiency, and scalability.
• Improve quality of results across timing, power, congestion, density, and overall design closure.
• Evaluate new P&R tool capabilities, debug flow and design issues, and implement practical optimizations.
• Provide end-user support and document methodologies, flow updates, and usage guidelines.
• Collaborate with physical design, RTL, synthesis, CAD, and multi-geo engineering teams.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
• 7+ years of industry experience in semiconductor design or design automation, including hands-on Place & Route or physical design experience in FPGA or ASIC environments.
• Applied knowledge of P&R algorithms, methodologies, physical design flows, floorplanning, placement, clocking, routing, and static timing analysis.
• Production experience with industry-standard EDA tools, including Synopsys and Cadence P&R tool suites.
• Strong coding experience in Tcl, Perl, and Python, plus experience in Unix/Linux development environments.
• Applicants must be eligible for any required Canada export authorizations. Canadian work experience is not required.

Culture & Benefits

• Performance-based incentive opportunities recognize individual contributions and company success.
• Work with cross-functional and multi-geo engineering teams on next-generation FPGA development.
• Focus on technical innovation, design quality, and scalable engineering methodologies.