TD Memory Quality and Reliability Engineer (SRAM)

Location: Hybrid work model with on-site attendance at an assigned hirify.global site in Folsom, Santa Clara, or Hillsboro, United States

Annual salary: $155,520–$219,550 USD

Company

hirify.global develops advanced semiconductor process technologies and supports their deployment through silicon-based quality, reliability, and technology readiness assessments.

What you will do

• Plan and execute SRAM, Register File, and fuse technology certification activities for advanced technology nodes.
• Define certification methodologies, test strategies, readiness requirements, and memory array characterization flows.
• Analyze large-scale silicon data across operating conditions to assess Vmin, Vmax, aging, variability, failure signatures, and design margins.
• Develop and validate silicon-based Vccmin and Vmax predictive models for certification, PDK releases, and product guidance.
• Perform silicon-to-simulation correlation assessments and identify root causes of discrepancies between measured silicon behavior and design predictions.
• Collaborate with Design, Device Engineering, Product Development Engineering, Yield, Process, Test, and reliability teams to deliver risk assessments and technology improvement recommendations.

Requirements

• Ph.D. in Electrical Engineering, Computer Engineering, Physics, or a related discipline with 2+ years of semiconductor industry experience, or an M.S. in a related field with 6+ years of semiconductor industry experience.
• At least 2 years of hands-on experience with memory testing.
• At least 2 years of quantitative analysis experience with large-scale memory or semiconductor datasets using statistical methods such as DOE, SPC, regression analysis, hypothesis testing, or multivariate analysis.
• At least 2 years of hands-on experience using JMP and Python for data analysis, statistical modeling, process optimization, automation, or visualization.
• Strong analytical, problem-solving, communication, and cross-functional collaboration skills.

Nice to have

• Experience in memory design, characterization, validation, modeling, product development, quality, reliability, or technology development.
• Knowledge of SRAM or Register File design, Vmin/Vmax characterization, memory margin assessment, array screening, or design-technology co-optimization.
• Experience with predictive models, statistical distributions, guardbands, product risk projections, Sil2Sim, SPICE modeling, or design validation.
• Programming experience in JSL, SQL, or data analytics frameworks.

Culture & Benefits

• Hybrid work model combining on-site work at an assigned hirify.global site with off-site work.
• Competitive pay, stock bonuses, health benefits, retirement programs, and vacation.
• Highly collaborative environment involving multiple engineering and program organizations.
• Opportunities to provide technical mentorship and influence technology development decisions.