9 часов назад
AI/ML Driven ASIC Design and Implementation Automation Engineer (AI/ML)
125 000 - 171 900$
Вакансия из Hirify Global, списка международных tech-компанийДля мэтча и отклика нужен Plus
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
AI/ML Driven ASIC Design and Implementation Automation Engineer (AI/ML): Developing and piloting AI/ML-driven automation for ASIC and SoC design and implementation with an accent on power, performance, area, and quality optimization. Focus on evaluating GenAI, reinforcement learning, graph neural networks, and convolutional networks in VLSI CAD flows, and building prototype solutions for advanced-node designs.
Location: San Diego, CA, United States
Salary: $125,000–$171,900 annually
Company
develops semiconductor solutions, including automotive processors and advanced microcontrollers.
What you will do
- Explore research ideas applying AI/ML techniques to VLSI design and ASIC implementation.
- Develop prototype automation solutions and evaluate them on real NXP SoC and IP designs.
- Improve power, performance, area, and overall quality of results for chip development.
- Work with AI/ML experts, academic research communities, architecture teams, IP and SoC designers, verification teams, and implementation teams.
- Define methods and requirements for AI/ML-enabled VLSI CAD software and tools.
- Drive automation and digital transformation initiatives across engineering teams.
Requirements
- Bachelor’s or master’s degree in Computer Science, Electrical Engineering, Computer Engineering, or a related discipline.
- 5+ years of experience applying AI and ML techniques to real-world optimization problems.
- Hands-on programming experience with Python and C++.
- Knowledge of data structures, algorithms, software development, and optimization.
- Experience with Unix/Linux, Git or BitBucket, software development, and debugging tools.
- Strong analytical, verbal, and written communication skills.
Nice to have
- Understanding of ASIC design, layout, constraints, static timing analysis, low-power, and power-aware flows.
- Experience with VLSI CAD methodology, EDA tools, HDL, front-end design, physical design, and layout implementation.
- Experience with SystemVerilog, Verilog, VHDL, DesignSync, Make, Splunk, Jenkins, LSF, or CI/CD processes.
Culture & Benefits
- Fast-paced engineering environment focused on advanced-node technologies and complex SoCs.
- Collaboration with engineering teams across multiple sites and with academic research communities.
- Health, dental, and vision insurance.
- 401(k) and paid leave.
- Competitive benefits, incentive compensation, and equity may be available for certain roles.
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