Senior Staff Signal Processing Engineer (Lidar)

Location: Hybrid work from hirify.global offices in Mountain View, CA; Bozeman, MT; or Louisville, CO, with at least 3 days per week in the office.

Salary: $212,000–$307,000 per year for roles based in Mountain View, CA; $191,000–$277,000 per year for roles based in Louisville, CO or Bozeman, MT. Additional annual bonus, equity compensation, and benefits are available.

Company

hirify.global develops self-driving technology for safer, more efficient transportation and logistics.

What you will do

• Lead the algorithmic strategy, modeling, and architecture of end-to-end DSP pipelines for coherent lidar systems.
• Translate mathematical models into optimized architectures for FPGAs, SIMD platforms, and future ASICs.
• Collaborate with photonics, optical R&D, and electrical engineering teams to convert optical properties and noise dynamics into digital algorithms and system requirements.
• Build scalable first-principles simulation frameworks and prototyping tools to evaluate performance, power, and area trade-offs before silicon bring-up.
• Drive DSP IP testing, verification, performance tuning, ASIC bring-up, and real-world system validation.

Requirements

• BSc, MSc, or PhD in electrical engineering, applied mathematics, physics, or a related quantitative field.
• 10+ years of relevant industry experience in advanced DSP design.
• Expert knowledge of signal-processing mathematics, including spectral estimation, filtering, phase recovery, modulation and demodulation, detection theory, and noise mitigation.
• Experience applying DSP in radar, optical or RF telecommunications, computational physics, or similarly signal-dense domains.
• Experience optimizing high-throughput algorithms for FPGAs, SoC/SIMD vector engines, and/or ASICs under latency, bandwidth, and compute constraints.
• Expert proficiency in Python, C/C++, or MATLAB for modeling, simulation, algorithm verification, and data analysis.

Nice to have

• Experience with high-speed optical or RF front ends, ADCs/DACs, and digital impairment compensation.
• Experience transitioning DSP algorithms from FPGA or SIMD prototypes to ASICs, including fixed-point optimization and silicon validation.
• Experience building physics-based models of wave propagation, coherent detection, channel dynamics, or sensor hardware non-idealities.
• Low-level optimization for SIMD architectures, vector engines, or DSP accelerators.

Culture & Benefits

• Collaborative environment focused on safety, integrity, ambitious goals, and shared results.
• Hybrid work model with regular in-office collaboration.
• Annual bonus, equity compensation, and employee benefits.
• Commitment to inclusion and reasonable accommodations for qualified candidates.