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11 часов назад

Senior Design Verification Engineer (Neuromorphic Computing)

122 440 - 232 190$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Senior Design Verification Engineer (Neuromorphic Computing) (Python/UVM/ASIC): Developing software-, RTL-, and emulation-based verification methodologies for neuromorphic silicon, with an accent on application-driven workloads, constrained-random testing, and coverage. Focus on mapping requirements to test plans, debugging regressions, maintaining assertions and scoreboards, and validating protocols for first-pass silicon success.

Location: Hybrid role with on-site work at an assigned hirify.global site in the United States. Primary location: Hillsboro, Oregon. Additional locations: Phoenix, Arizona; Folsom and Santa Clara, California; Austin, Texas.

Annual salary: $122,440–$232,190 USD, depending on work location, skills, experience, and education or training.

Company

hirify.global's Neuromorphic Computing Lab develops brain-inspired architectures, algorithms, software, and research chips for physical AI systems.

What you will do

  • Develop verification methodologies across software, RTL, and emulation platforms for neuromorphic silicon.
  • Map application-level requirements to unit- and system-level test plans.
  • Write Python-based directed and random tests for design partitions and chip-level validation.
  • Run regressions, debug failures, track coverage, and collaborate with designers to resolve issues.
  • Maintain assertions, scoreboards, and verification tools and flows.
  • Integrate commercial Verification IPs and coordinate with IP teams to validate protocol requirements.

Requirements

  • Bachelor's degree with 5+ years or master's degree with 3+ years of silicon engineering experience.
  • 3+ years of pre-silicon verification or post-silicon validation experience in SoC accelerators or custom ASIC designs.
  • 3+ years of experience with UVM and constrained-random verification methods.
  • 2+ years developing the full verification stack, including test development, coverage tracking, emulation, and post-silicon activities.
  • 1+ year using AI tools for test generation, debugging, and productivity improvement.
  • Availability for the hybrid work model and on-site work at an assigned US hirify.global site.

Nice to have

  • Experience with neuromorphic computing or AI/ML accelerator design.
  • Experience with Verification IPs for Ethernet, PCIe, MACsec/IPsec, RoCEv2, MIPI CSI-2, or JESD204.
  • Experience with DFX, low-power, and UPF verification techniques.
  • Knowledge of asynchronous design techniques or AI-driven verification automation.

Culture & Benefits

  • Hybrid work model combining on-site and off-site work.
  • Competitive pay with stock bonuses.
  • Health, retirement, and vacation benefits.
  • Collaboration across architecture, design, software, and IP teams.

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