Senior Staff Engineer, Analog Layout (Semiconductor)

TL;DR

Senior Staff Engineer, Analog Layout (Semiconductor): Development of High-Speed Connectivity, Broadband Analog, and Computing/Storage-Memory Data-Transport products with an accent on high-performance analog circuit layout in state-of-the-art CMOS technologies. Focus on owning chip/macro layouts, optimizing parasitics, and ensuring successful top-level integration for volume production.

Location: Singapore

Company

hirify.global provides semiconductor solutions that serve as essential building blocks for data infrastructure across enterprise, cloud, and AI architectures.

What you will do

• Own chip and macro layout, including overall project scheduling and management.
• Coordinate with layout, design, backend, frontend, ESD, packaging, and CAD groups.
• Lead cross-functional teams, including the management of remote design teams.
• Develop and implement project-specific guidelines to ensure team consistency.
• Contribute to the team through tool testing, script development, and flow documentation.
• Research and integrate new technology and tool developments into the team's workflow.

Requirements

• Bachelor’s or Master's degree in Electrical Engineering, Computer Science, or a related field.
• 12+ years of professional experience in analog layout.
• Deep expertise in layout methodology from initial planning to tape-out and parasitic optimization.
• Proficiency in interpreting CALIBRE DRC, ERC, and LVS reports.
• High-level proficiency with Synopsys or Cadence layout entry tools.
• Fluent English proficiency and eligibility to access export-controlled information (US EAR).

Nice to have

• Experience with advanced process technology and Fin-FET.
• Programming skills in Skill, Ample, or Perl.

Culture & Benefits

• Competitive compensation and comprehensive benefits package.
• Work environment focused on shared collaboration, transparency, and inclusivity.
• Access to tools and resources for professional growth and development.