Sr. EMIR Engineer (AI)

TL;DR

Sr. EMIR Engineer (AI): Contributing to the EMIR sign-off of custom SoCs for AI workloads with an accent on power grid design, modeling, and analysis at the die, package, and board levels. Focus on developing advanced methodologies for EMIR analysis, collaborating with cross-functional teams to ensure high-quality silicon, and correlating simulation results with post-silicon measurements.

Location: Must be based in Austin, TX or Cupertino, CA

Salary: $159,200 – $247,600 USD annually

Company

A global technology leader driving innovation in cloud computing, AI hardware, and large-scale infrastructure.

What you will do

• Design and analyze power grids for large subsystems and SoCs.
• Develop and maintain flows for EMIR analysis and automated dashboards.
• Partner with EDA tool vendors to evaluate and implement new analysis methodologies.
• Collaborate with architects, RTL, and physical design engineers to develop worst-case vectors for power and IR analysis.
• Perform concurrent IR analysis across SoC, package, and board levels.
• Conduct post-silicon power measurements and correlate findings with simulation models.

Requirements

• Must be based in the USA (Austin, TX or Cupertino, CA)
• 5+ years of experience in ASIC implementation, synthesis, STA, and physical design in deep sub-micron nodes (16nm or smaller).
• BS/MS/PhD in EE/CS with 3-6+ years of relevant industry experience.
• Expertise in EMIR analysis tools such as Redhawk-SC or Voltus.
• Deep circuit-level understanding of power, EM, IR, and thermal integrity.
• High proficiency in scripting languages like Tcl, Perl, or Python.

Nice to have

• Experience with RTL design (SystemVerilog).
• Familiarity with PnR tools like FusionCompiler or Innovus.
• Experience with power and timing analysis tools (PrimePower, PrimeTime).
• Hands-on experience with lab equipment for power analysis.

Culture & Benefits

• Comprehensive health insurance (medical, dental, vision).
• 401(k) matching program.
• Competitive compensation package including sign-on bonuses and RSUs.
• Paid time off and parental leave.
• Inclusive and collaborative work environment focused on high-impact AI hardware development.