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8 часов Π½Π°Π·Π°Π΄

Senior Analog / Mixed Signal Application Engineer

141Β 910 - 269Β 100$
Π€ΠΎΡ€ΠΌΠ°Ρ‚ Ρ€Π°Π±ΠΎΡ‚Ρ‹
hybrid
Π’ΠΈΠΏ Ρ€Π°Π±ΠΎΡ‚Ρ‹
fulltime
Π“Ρ€Π΅ΠΉΠ΄
senior
Английский
b2
Π‘Ρ‚Ρ€Π°Π½Π°
US
Вакансия ΠΈΠ· списка Hirify.GlobalВакансия ΠΈΠ· Hirify RU Global, списка ΠΊΠΎΠΌΠΏΠ°Π½ΠΈΠΉ с восточно-СвропСйскими корнями
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ΠœΡΡ‚Ρ‡ & Π‘ΠΎΠΏΡ€ΠΎΠ²ΠΎΠ΄

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ОписаниС вакансии

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TL;DR

Senior Analog / Mixed Signal Application Engineer: Provide customer-facing technical support for analog/mixed-signal design on hirify.global Foundry Services PDKs, design methodologies, and implementation flows with an accent on successful tape-outs and quality improvements in design kits and documentation. Focus on driving analog tool-flow guidance (schematic entry through simulation and reliability validation) and leading best-practice methodology for advanced CMOS processes.

Location: US, Arizona, Phoenix (Primary); US, California, Santa Clara; US, Oregon, Hillsboro

Salary: $141,910–$269,100 USD (annual)

Company

hirify.global Foundry Services delivers silicon process and packaging technology leadership and a design ecosystem for the AI era.

What you will do

  • Support customers with tool/flow/methodology guidance to resolve analog mixed-signal design issues and enable successful tape-outs.
  • Collaborate with internal hirify.global teams and external stakeholders (customer design teams, IP providers, EDA vendors) to resolve AMS design and layout problems.
  • Create application notes, documentation, and technical training presentations; improve design kits and documentation to remove barriers to tape-outs.
  • Provide technical direction on custom/analog mixed-signal design and layout methodologies and streamline customer design workflows.
  • Support analog tool flows including schematic entry, analog/RF simulation, extraction, post-layout simulation, and reliability validation.

Requirements

  • US Citizenship required and ability to obtain US Government Security Clearance.
  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a STEM-related field.
  • 5+ years of experience with advanced CMOS processes (16nm and below).
  • 4+ years of experience with scripting languages: Python, Perl, Tcl, or shell scripting.
  • Hands-on experience in design implementation and methodology for custom/analog mixed-signal design/layout.

Nice to have

  • Active US Government Security Clearance (minimum Secret level).
  • Postgraduate degree in Electrical/Computer Engineering, Computer Science, or STEM.
  • Experience providing technical direction to engineering teams and driving methodology improvements.
  • Experience with analog tool flows and reliability validation; custom layout of analog blocks and layout migration across advanced FinFET tech nodes.
  • Experience designing RF/analog/mixed-signal blocks (e.g., LNAs, filters, mixers, VCO, PLL, ADC/DAC) and thermal analysis (Ansys Icepak and/or Cadence Celsius).

Culture & Benefits

  • Hybrid work model: split time between on-site at the assigned hirify.global site and off-site.
  • Total compensation package includes competitive pay, stock bonuses, and benefits (health, retirement, vacation).
  • Work with cutting-edge analog mixed-signal technologies for aerospace, defense, and government applications.
  • Direct customer engagement and technical leadership in advanced semiconductor design.
  • Professional development in analog design methodologies and foundry services.

Hiring process

  • Recruiter shares location-specific compensation details within the posted US salary range.
  • Interviews evaluate technical fit for analog/mixed-signal design support and methodology leadership.
  • Security clearance requirements are assessed as part of the hiring process.

Π‘ΡƒΠ΄ΡŒΡ‚Π΅ остороТны: Ссли Ρ€Π°Π±ΠΎΡ‚ΠΎΠ΄Π°Ρ‚Π΅Π»ΡŒ просит Π²ΠΎΠΉΡ‚ΠΈ Π² ΠΈΡ… систСму, ΠΈΡΠΏΠΎΠ»ΡŒΠ·ΡƒΡ iCloud/Google, ΠΏΡ€ΠΈΡΠ»Π°Ρ‚ΡŒ ΠΊΠΎΠ΄/ΠΏΠ°Ρ€ΠΎΠ»ΡŒ, Π·Π°ΠΏΡƒΡΡ‚ΠΈΡ‚ΡŒ ΠΊΠΎΠ΄/ПО, Π½Π΅ Π΄Π΅Π»Π°ΠΉΡ‚Π΅ этого - это мошСнники. ΠžΠ±ΡΠ·Π°Ρ‚Π΅Π»ΡŒΠ½ΠΎ ΠΆΠΌΠΈΡ‚Π΅ "ΠŸΠΎΠΆΠ°Π»ΠΎΠ²Π°Ρ‚ΡŒΡΡ" ΠΈΠ»ΠΈ ΠΏΠΈΡˆΠΈΡ‚Π΅ Π² ΠΏΠΎΠ΄Π΄Π΅Ρ€ΠΆΠΊΡƒ. ΠŸΠΎΠ΄Ρ€ΠΎΠ±Π½Π΅Π΅ Π² Π³Π°ΠΉΠ΄Π΅ β†’