SOC Design Verification Engineer (SystemVerilog)
Мэтч & Сопровод
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Описание вакансии
TL;DR
SOC Design Verification Engineer (SystemVerilog/UVM): Performing functional logic verification of integrated SoCs to ensure they meet specifications with an accent on scalable verification plans and test benches. Focus on replicating and debugging issues in presilicon environments and improving verification infrastructure.
Location: Hybrid (US: Santa Clara, Folsom, Beaver Brook, or Hillsboro)
Salary: $164,470 – $269,100
Company
A global leader in silicon innovation, designing and manufacturing chips that power the world's digital infrastructure.
What you will do
- Perform functional logic verification of integrated SoCs to ensure compliance with microarchitecture specifications.
- Develop scalable and reusable verification plans, test benches, and environments.
- Execute emulation and system simulation models to analyze power, performance, and uncover bugs.
- Root cause and debug issues in presilicon environments and implement corrective measures.
- Collaborate with SoC architects, RTL developers, and physical design teams to improve verification of complex features.
- Integrate security activities, including regression and debug tests, into verification plans.
Requirements
- Bachelor's degree in Electrical Engineering, Computer Science, or related field with 6+ years of experience (Master's 4+ years, PhD 2+ years).
- Must be based in the USA and eligible for a hybrid work model.
- Proficiency in OVM/UVM methodologies and SystemVerilog-based constrained random verification.
- Experience in developing and executing verification test plans, including debugging and coverage closure.
- Strong skills in scripting languages to facilitate automation.
Nice to have
- Experience in Xeon CPU Pre-Silicon or Post-Silicon Validation.
- Technical expertise in cache coherency principles for multi-processor SoCs.
- Knowledge of layered protocols (transaction, data link, and PHY layers).
- Demonstrated ability to drive continuous improvement in test suites.
Culture & Benefits
- Competitive total compensation package including stock bonuses.
- Comprehensive health, retirement, and vacation programs.
- Hybrid work model allowing a balance between on-site and off-site work.
- Opportunity to work on cutting-edge silicon technology and AI-accelerated systems.
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