Lead Design Engineer (Embedded)

TL;DR

Lead Design Engineer (Embedded): Verification of processor cores and hardware features within the Tensilica team with an accent on architecture, micro-architecture, and UVM-based verification infrastructure. Focus on developing detailed test plans, applying formal verification methodologies, and ensuring high-quality design sign-off for emerging hardware products.

Location: Shanghai

Company

hirify.global is a global leader in electronic design and computational software, focused on solving complex hardware and software engineering challenges.

What you will do

• Take ownership of feature verification from initial test planning to final sign-off.
• Develop and maintain SystemVerilog/UVM testbenches and verification infrastructure.
• Apply formal verification techniques to ensure design quality and performance.
• Collaborate with the design team to analyze micro-architecture and pipeline behavior.
• Develop novel verification techniques to validate processor performance.

Requirements

• Location: Must be based in Shanghai
• Strong knowledge of computer architecture, specifically processor pipelines and vector processing.
• Proficiency in Verilog, SystemVerilog, and UVM.
• Understanding of DSP arithmetic functions.
• Basic proficiency in C or C++ and scripting languages like Python or Perl.
• MS degree in Electrical or Computer Engineering with at least 2 years of relevant experience.

Nice to have

• Familiarity with AI in Design and DV.
• Experience with performance modeling and benchmarks.
• Knowledge of source code control systems like Git or Perforce.

Culture & Benefits

• Opportunity to work on cutting-edge processor technology.
• Collaborative environment with global teams across different time zones.
• Focus on innovation and solving complex technological problems.